Method for manufacturing semiconductor integrated circuit...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S591000, C257S324000, C257SE27046, C257SE27064

Reexamination Certificate

active

10968050

ABSTRACT:
In a process of forming MISFETs that have gate insulating films that are mutually different in thickness on the same substrate, the formation of an undesirable natural oxide film at the interface between the semiconductor substrate and the gate insulating film is suppressed. A gate insulating film of MISFETs constituting an internal circuit is comprised of a silicon oxynitride film. Another gate insulating film of MISFETs constituting an I/O circuit is comprised of a laminated silicon oxynitride film and a high dielectric film. A process of forming the two types of gate insulating films on the substrate is continuously carried out in a treatment apparatus of a multi-chamber system. Accordingly, the substrate will not be exposed to air. Therefore, it is possible to suppress the inclusion of undesirable foreign matter and the formation of a natural oxide film at the interface between the substrate and the gate insulating films.

REFERENCES:
patent: 5516706 (1996-05-01), Kusakabe
patent: 5960289 (1999-09-01), Tsui et al.
patent: 6037222 (2000-03-01), Huang et al.
patent: 6165825 (2000-12-01), Odake
patent: 6194257 (2001-02-01), Kwon
patent: 6417052 (2002-07-01), Tsujikawa et al.
patent: 6524910 (2003-02-01), Lin et al.
patent: 6660597 (2003-12-01), Furukawa et al.
patent: 6911707 (2005-06-01), Gardner et al.
patent: 2000-188338 (2000-07-01), None
patent: 2001-284463 (2001-10-01), None
patent: 2001-298095 (2001-10-01), None
Fig. 4(e) of JP No. 2001-284463 with indication in English.
Fig. 2(f) of JP No. 2001-298095 with indication in English.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for manufacturing semiconductor integrated circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing semiconductor integrated circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing semiconductor integrated circuit... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3724352

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.