Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-03-07
2006-03-07
Chen, Jack (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S393000
Reexamination Certificate
active
07008840
ABSTRACT:
A method for manufacturing a semiconductor device includes the steps of forming a conductive layer over a first insulating layer formed on a substrate, and over a plurality of contact plugs formed in the first insulating layer; forming a plurality of capacitor element lower electrodes by patterning the conductive layer; forming a second insulating layer on the first insulating layer and the capacitor element lower electrodes; forming recesses in the second insulating layer at a region above the capacitor element lower electrodes; planarizing the second insulating layer by polishing; exposing the capacitor element lower electrodes; and forming a capacitive insulating film and capacitor element upper electrodes above the capacitor element lower electrodes. In polishing the second insulating layer, leveling of steps can be accelerated, insufficient polishing, peeling of the lower electrodes and generation of scratches can be suppressed, and the global step difference can be reduced.
REFERENCES:
patent: 5843830 (1998-12-01), Graettinger et al.
patent: 6210999 (2001-04-01), Gardner et al.
patent: 6339008 (2002-01-01), Takenaka
patent: 10-321628 (1998-12-01), None
Jyuudai Yuuji
Mikawa Takumi
Natsume Shinya
Chen Jack
Hamre Schumann Mueller & Larson P.C.
Matsushita Electrical Industrial Co. Ltd.
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