Method for manufacturing semiconductor device capable of improvi

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438626, H01L 214763

Patent

active

060838264

ABSTRACT:
A method is disclosed for manufacturing a semiconductor device that is capable of minimizing a step difference between DRAM and logic regions of a semiconductor substrate by forming a capacitor in the DRAM cell region and then forming a metal interconnection in the logic region after deposition of a first insulating layer before planarization, the metal interconnection having height similar to the capacitor. Although a second insulating layer is deposited over the substrate, a step between the DRAM cell region and local region can be minimized because of the metal interconnection formed in the logic region. Thus, although only either CMP or etch back process is used, planarization of the second insulating layer is allowed.

REFERENCES:
patent: 5313417 (1994-05-01), Yanagi
patent: 5633201 (1997-05-01), Choi

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