Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2009-06-30
2011-12-27
Nguyen, Khiem D (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21422
Reexamination Certificate
active
08084326
ABSTRACT:
The present invention relates to a method for manufacturing a semiconductor device, and provides to reduce a contact resistance of a landing plug by forming the landing plug in such a manner that a polysilicon layer is deposited only on the surface of a landing plug contact hole, and a metal layer is buried in the rest of the landing plug contact hole in the process of forming a storage node contact or a bit line contact.
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patent: 5183782 (1993-02-01), Onishi et al.
patent: 5705427 (1998-01-01), Chan et al.
patent: 2004/0201043 (2004-10-01), Mao et al.
patent: 2005/0142869 (2005-06-01), Lee
patent: 1020060008613 (2006-01-01), None
patent: 1020070036975 (2007-04-01), None
Hynix / Semiconductor Inc.
Nguyen Khiem D
Shook Daniel
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