Method for manufacturing semiconductor device

Details Method for manufacturing semiconductor device Method for manufacturing semiconductor device

2005-02-01

2005-02-01

Norton, Nadine G. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S696000, C438S700000, C438S704000, C438S712000, C438S723000

Reexamination Certificate

active

06849550

ABSTRACT:
A method for manufacturing a semiconductor device that forms a connection hole with high electric reliability even when the semiconductor device is designed to be highly integrated. The semiconductor device includes a lower layer wiring and an interlayer insulation film, which is formed on the lower layer wiring and has a connection hole connected with the lower layer wiring. The method includes forming the connection hole by etching the interlayer insulation film. The connection hole is formed by etching part of the lower layer wiring under a first etching condition through physical reaction in at least the vicinity of the lower layer wiring, and by etching part of the interlayer insulation film under a second etching condition that guarantees a selective ratio relative to the lower layer wiring.

REFERENCES:
patent: 6110826 (2000-08-01), Lou et al.
patent: 6228755 (2001-05-01), Kusumi et al.
patent: 7169738 (1995-07-01), None
Japan Patent Office Action dated Mar. 30, 2004 in Japanese, App # 2001-208963

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