Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2002-08-13
2004-03-23
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S701000, C438S703000, C438S706000, C438S707000, C438S708000
Reexamination Certificate
active
06709984
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and especially relates to a manufacturing method for creating a trench on a semiconductor substrate using plasma.
DESCRIPTION OF THE RELATED ART
Along with the advance in the integration of semiconductor devices, it has become indispensable to reduce the element isolation distance utilizing trench isolation technology, which is a technique for isolating elements in a semiconductor device. According to trench isolation, a trench is formed on the semiconductor substrate, but if the upper surface of the semiconductor substrate, the side walls of the trench and the bottom surface of the trench are joined linearly, it is known that electric field concentration occurs at the joints (end regions). It is considered that crystal defect at the end region and unevenness of the padoxide filmare the causes of such electric field concentration. This problem can be solved by rounding off the upper end portion and the lower end portion of the trench.
For example, Japanese Patent Laid-Open Provisional Publication No. 2001-345375 discloses rounding off the upper end portion of the trench using reactive gas containing HBr and CF4 with a remaining resist mask layer used as the mask.
According to the above example where the resist is used as the mask for rounding off the upper end of the trench in processing the semiconductor substrate, consideration is made on the possible contamination of the semiconductor substrate caused by the resist which may affect the semiconductor characteristics, so in some cases after using the resist as mask to process the insulating layer on the semiconductor substrate, the resist is removed and the insulation layer is used as the mask to form the trench on the semiconductor substrate. According to such example, however, it is difficult to create a sufficient roundness to the upper end portion of the trench when an etching gas selected in expectation of the reaction product with the resist is used.
SUMMARY OF THE INVENTION
The object of the present invention is to solve the problems of the prior art. The present invention provides a method for manufacturing a semiconductor device comprising forming openings to the insulation layer using a resist as the mask, removing the resist, and processing the semiconductor substrate utilizing the insulation layer as the mask to create a sufficient roundness to the upper end of the trench of the semiconductor substrate.
In order to solve the prior art problems, the present invention utilizes a surface processing device comprising a vacuum chamber, a means for generating plasma within the chamber, a sample stage onto which the sample receiving surface processing using plasma is mounted, and a power source for applying high frequency voltage to the sample stage, wherein a semiconductor substrate having an insulation layer as mask is etched using mixed gas including HBr gas and CHF3 gas, the reaction product thereof being adhered to the side walls of the pattern, and then performing fine etching of the adhered side walls so as to create a rounding having sufficient size to the upper end of the trench.
REFERENCES:
patent: 4693781 (1987-09-01), Leung et al.
patent: 4857477 (1989-08-01), Kanamori
patent: 5843846 (1998-12-01), Nguyen et al.
patent: 6001706 (1999-12-01), Tan et al.
patent: 6153494 (2000-11-01), Hsieh et al.
patent: 6235643 (2001-05-01), Mui et al.
patent: 6432832 (2002-08-01), Miller et al.
patent: 6589879 (2003-07-01), Williams et al.
S, Wolf, Silicon Processing for the VLSI Era, vol. 2—Process Integration, 1990, pp. 51-54.*
TI's “Trench Technology Moves into the Factory”, Electronics, Jul. 9, '87, p87.*
R. N. Carlile et al., “Trench Etches in Silicon with Controllable Sidewall Angle”, Electrochem. Soc., Aug., 1988, p. 2058.*
G. K. Herb et al., “silicon Trench Etch in a Hex Reactor”, Solid State Technology. Oct. 1967 p.109-115.
Ishimura Hiroaki
Kudoh Yutaka
Saito Go
Sakaguchi Masamichi
Takata Kazuo
Antonelli Terry Stout & Kraus LLP
Hitachi High-Technologies Corporation
Keshavan B.
Smith Matthew
LandOfFree
Method for manufacturing semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3263224