Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-10-19
2002-09-17
Whitehead, Jr., Carl (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S629000, C438S643000, C438S650000, C438S653000, C438S670000, C438S678000, C438S687000
Reexamination Certificate
active
06451689
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device such as a semiconductor integrated circuit (IC) and an LSI or the like in which a fine wiring is formed. More particularly, the invention relates to a method for manufacturing a semiconductor device in which a copper film which can suppress wiring resistance to a small level according to miniaturization can be efficiently formed with close contact characteristic, in a predetermined pattern and with a low resistance.
BACKGROUND OF THE INVENTION
Along with a higher integration of the semiconductor device in recent years, demand is made on an extremely thin and fine wiring. Using a copper film having a small resistance is considered in the place of a conventional Al as a wiring for the semiconductor device. However, since it is difficult to etch copper, it is difficult to form the copper film by covering the entire surface by a sputtering method and patterning the surface thereof. Consequently, it is thought to form the copper film either by an electroless plating method or an electroplating method as a method for forming such copper film.
However, in the electroless plating method, a reaction start layer comprising paradium or the like is required wherein a copper ion starts reaction. However, when a paradium layer or the like is provided by the sputtering method, the thickness of the layer becomes thick. When a copper film is formed by the electroless plating method, metal such as paradium or the like constituting the reaction start layer is diffused in large quantity in this copper film at the time of forming the copper film. The reaction start layer formed of paradium or the like has a larger specific resistance than copper, and raises the electric resistivity of this copper film with the diffused paradium or the like even if a copper film is used which has a small resistivity. Consequently, there is a problem in that an increase in the integration is restricted because a decrease in the resistance of the wiring film which is to be made fine cannot be sufficiently satisfied, and the wiring cannot be made thin.
Furthermore, for example, Japanese Unexamined Patent Publication No. HEI 7-321111 discloses a method for forming a wiring for a semiconductor device by the electroless plating comprising: forming a zinc oxide layer; electrifying the zinc oxide layer by electroless plating in a solution in which metal having smaller ionization tendency than the zinc oxide, for example, paradium is dissolved; and forming a wiring such as copper or the like on the upper surface thereof. However, in these cases, the film cannot be patterned after the copper film is formed. The film should be patterned in the state of the reaction start layer, and a certain degree of thickness is required to etch the reaction layer with good precision. There is a problem in that when the reaction start layer becomes thick, an increase in the specific resistance by the dispersion(diffusion) of paradium into the copper film cannot be prevented sufficiently in a similar manner as the sputtering method as described above, and oxygen remains in the zinc oxide film layer to increase a contact resistance.
On the other hand, in the case where a copper film is formed on an insulting film by using an electric plating method, a feeding layer becomes necessary for electrification. In such a case, when wiring is formed of copper or the like, copper passes through the insulation layer and is diffused into the semiconductor layer thereby exerting an unfavorable influence upon the operation of the semiconductor device. Thus it is thought that a barrier metal layer is provided as a base layer of the wiring. As this barrier layer, generally metal layers such as Ti, TiN or the like is used. Then, the metal layer is formed in a predetermined pattern by forming the film by the sputtering method, the CDV method or the like to pattern the film. Thus, it is thought that copper is subjected to the electroplating by using this barrier layer as a feeder layer.
As described above, in order to lower an electric resistance of wiring along with miniaturization, wiring by a copper film having a small specific resistance is considered. In the electroless plating method, there is a problem in that the constituent element of the reaction start layer is diffused in the copper film, and at the same time, the electric resistance of the wiring is increased as well as the film quality is not fine, and, in addition, it takes a long time to form the film. There is also a problem in that even if an attempt is made to form the film by the electric plating method, the specific resistance of the barrier layer which is considered as a feeder layer is large, and the electric resistance becomes large in fine wiring which has been miniaturized, and at the same time, the metal of the barrier layer and copper has an unfavorable contact characteristic, so that a copper film cannot be sufficiently formed. In particular, there is also a problem in that electricity is not sufficiently supplied on the end portion side such as a contact hole or the like distant from the feeding side because of the resistance of the barrier metal layer, film formation becomes insufficient, and the thickness of the copper film is irregular depending upon locations thereof.
Furthermore, in this kind of highly integrated semiconductor device, there is a case in which a wiring groove is formed by means of etching of the wiring pattern portion in order to prevent the rise of the wiring to planarize the device and the wiring is formed in the groove. In such a method, a patterning process is required for forming a wiring groove in the insulting film. Furthermore, a patterning of the wiring is required, and a margin for a shift in both masks is required. Consequently, there is a problem in that the miniaturization of the wiring is prevented, and the patterning must be conducted separately with the result that the number of process increases and the cost comes too high.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for manufacturing a semiconductor device wherein the diffusion of an element constituting a reaction layer into a copper film is prevented by providing the reaction start layer which serves as a seed layer while a copper film is formed by a electroless plating in the case of forming a copper film wiring, and a copper film wiring is formed which has a small resistance and an excellent conductivity with good reliability, and a higher integration can be accomplished by further miniaturization of the wiring.
Another object of the present invention is to provide a method for manufacturing a semiconductor device wherein a wiring is formed of a fine copper film having a small electric resistance with good reliability in a short time in the case of forming the wiring in the process of forming the wiring, and a higher integration can be accomplished by the miniaturization of the wiring.
Still another object of the present invention is to provide a method for enabling to effectively form a reaction layer that functions as a base on forming copper film by electroplating.
Still another object of the present invention is to provide a method for manufacturing a semiconductor, the method being capable of accurately forming a fine pattern without generating a problem of a shift in the mask by decreasing the number of processes and attaining a higher integration. Furthermore, the simplification of the process and the diffusion of metal of the reaction start layer into a copper film is prevented, a copper film having a small resistance and an excellent conductivity is formed with good reliability, and still higher integration can be attained with the miniaturization of one layer of the wiring.
The method for manufacturing a semiconductor according to the present invention wherein a contact hole is provided on an insulting film on a substrate to be connected to an exposed portion by the contact hole, and a wiring is formed on the insulting film, the method c
Arent Fox Kintner & Plotkin & Kahn, PLLC
Duong Khanh B.
Jr. Carl Whitehead
Rohm & Co., Ltd.
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