Method for manufacturing salicide semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438305, 438592, 438230, 438233, 438970, H01L 21336

Patent

active

056565194

ABSTRACT:
In a method for manufacturing a salicide MOS device, a gate insulating layer and a polycrystalline silicon gate electrode layer are formed on a monocrystalline silicon substrate. A sidewall insulating layer is formed on a sidewall of the gate electrode layer, and impurities are introduced into the substrate with a mask of the sidewall insulating layer and the gate electrode layer, thus forming impurity diffusion regions in the substrate. Then, an upper portion of the gate electrode layer is etched out. Finally, a metal layer is formed on the entire surface, and a heating operation is carried out, so that metal silicide layers are formed on upper portions of the gate electrodes and the impurity diffusion regions. In an alternative embodiment, the gate further comprises an intervening metal nitride layer.

REFERENCES:
patent: 4784971 (1988-11-01), Chiu et al.
patent: 4948745 (1990-08-01), Pfiester et al.
patent: 4998150 (1991-03-01), Rodder et al.
patent: 5164333 (1992-11-01), Schwalke et al.
patent: 5168072 (1992-12-01), Moslehi
patent: 5322809 (1994-06-01), Moslehi
"A Self-Aligned Elevated Source/Drain MOSFET," James R. Pfiester et al., IEEE Electron Device Letters, vol. 11, No. 9, Sep. 1990, pp. 365-367.
"Self-Aligned Tungsten Strapped Source/Drain and Gate Technology Realizing the Lowest Sheet Resistance for Sub-Quarter Micron CMOS," M. Sekine et al., IEEE IEDM, Dec./1994, pp. 493-496.
"W/WNx/Poly-Si Gate Technology for Future High Speed Deep Submicron CMOS LSIs," K. Kasai et al., IEEE IEDM, Dec./1994, pp. 497-500.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for manufacturing salicide semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing salicide semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing salicide semiconductor device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-159890

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.