Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-02-13
1997-08-12
Quach, T. N.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438305, 438592, 438230, 438233, 438970, H01L 21336
Patent
active
056565194
ABSTRACT:
In a method for manufacturing a salicide MOS device, a gate insulating layer and a polycrystalline silicon gate electrode layer are formed on a monocrystalline silicon substrate. A sidewall insulating layer is formed on a sidewall of the gate electrode layer, and impurities are introduced into the substrate with a mask of the sidewall insulating layer and the gate electrode layer, thus forming impurity diffusion regions in the substrate. Then, an upper portion of the gate electrode layer is etched out. Finally, a metal layer is formed on the entire surface, and a heating operation is carried out, so that metal silicide layers are formed on upper portions of the gate electrodes and the impurity diffusion regions. In an alternative embodiment, the gate further comprises an intervening metal nitride layer.
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NEC Corporation
Quach T. N.
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