Method for manufacturing polysilicon load

Details Method for manufacturing polysilicon load Method for manufacturing polysilicon load

1998-01-22

1999-12-14

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438264, H01L 218244

Patent

active

060016795

ABSTRACT:
A method for manufacturing SRAM polysilicon loads that utilizes a silicon dioxide layer formed between an interconnect and a load as barrier in preventing the out-diffusion of heavily doped impurities into the lightly doped or undoped polysilicon load. Hence, the effective length and the resistance of the polysilicon load can be maintained, and the dimensions of SRAM devices can be further reduced. Furthermore, the prevention of out-diffusion from a heavily doped interconnect region into a lightly doped load region serves to maintain the electrical conductivity of interconnects. Therefore, SRAM device fabrication is more easily controlled, and product reliability can be increased.

REFERENCES:
patent: 5605853 (1997-02-01), Yoo et al.
patent: 5770497 (1998-06-01), Wu et al.

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