Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-04-11
1998-08-11
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438382, H01L 218234, H01L 218244
Patent
active
057926832
ABSTRACT:
In a semiconductor device, an undoped polysilicon layer on the uppermost layer is used as a high resistor device without any patterning. A metal wiring layer formed on this high resistor device is connected to a conductive layer formed below the high resistor device via a contact hole extending through the high resistor device. In addition, by oxidizing an end portion, exposed in the contact hole, of the high resistor device, an oxide film is interposed between the high resistor device and the metal wiring layer to attain electrical insulation therebetween. In this manner, the high resistor device is formed of the undoped polysilicon layer by using a multilayered polysilicon structure including the undoped polysilicon layer. Therefore, the integration degree can be increased, and at the same time, a stepped portion accompanying with the multilayered silicon structure is relaxed to improve the flatness of the surface and prevent poor step coverage or bridging of an upper wiring layer.
REFERENCES:
patent: 4965214 (1990-10-01), Choi et al.
patent: 5187114 (1993-02-01), Chan et al.
patent: 5241206 (1993-08-01), Lee et al.
Hayashi Taketoshi
Tagami Ryuzo
Chang Joni
NKK Corporation
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