Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Patent
1995-05-11
1997-09-02
Thomas, Tom
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
438201, 438258, 438588, H01L 218247
Patent
active
056630840
ABSTRACT:
A method for manufacturing a nonvolatile memory device having a memory cell array and a peripheral circuit portion which includes the steps of forming a field oxide film on a semiconductor substrate to form an active region and an isolation region; forming a first dielectric layer on the entire surface of the substrate where the field oxide film is formed; forming a first conductive layer on the dielectric layer; patterning the conductive layer to form a first conductive pattern in the memory cell array and in the peripheral circuit portion; forming a second dielectric layer on the entire surface of the substrate where the first conductive pattern is formed; selectively etching the second dielectric layer, first conductive pattern, and first dielectric layer formed in the peripheral circuit portion to expose the surface of the substrate in the peripheral circuit portion; forming a third dielectric layer on the substrate of the exposed peripheral circuit portion and on the second dielectric layer of the cell array; forming a second conductive layer on the entire surface of the substrate where the third dielectric layer is formed; and patterning the second conductive layer, second dielectric layer, third dielectric layer, and first conductive layer to form a gate electrode in the peripheral circuit portion, and a control gate, a floating gate, and an upper dielectric layer in the cell array.
REFERENCES:
patent: 4780431 (1988-10-01), Maggioni et al.
patent: 5188976 (1993-02-01), Kume et al.
Choi Jeong-hyuk
Yi Jeong-hyong
Samsung Electronics Co,. Ltd.
Thomas Tom
Thomas Toniae M.
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