Method for manufacturing non-volatile memory device having...

Details Method for manufacturing non-volatile memory device having... Method for manufacturing non-volatile memory device having...

2008-12-31

2010-06-15

Pham, Thanhha (Department: 2894)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S584000, C257SE21679

Reexamination Certificate

active

07736975

ABSTRACT:
A method for manufacturing a non-volatile memory device having a charge trap layer comprises in one embodiment: forming a first dielectric layer over a semiconductor substrate; forming a second dielectric layer having a higher dielectric constant than that of the first dielectric layer over the first dielectric layer; forming a nitride buffer layer for preventing an interfacial reaction over the second dielectric layer; forming a third dielectric layer by supplying a radical oxidation source onto the nitride buffer layer to oxidize the nitride buffer layer, thereby forming a tunneling layer comprising the first, second, and third dielectric layers; and forming a charge trap layer, a shielding layer, and a control gate electrode layer over the tunneling layer.

REFERENCES:
patent: 6551948 (2003-04-01), Ohmi et al.
patent: 7405125 (2008-07-01), Wang
patent: 2009/0163014 (2009-06-01), Lee et al.
patent: 10-2004-0012973 (2004-02-01), None
patent: 10-2005-0072979 (2005-07-01), None
patent: 10-2006-0108352 (2006-10-01), None
patent: 10-2008-0069919 (2008-07-01), None

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