Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-01-22
2000-11-07
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438386, H01L 218242
Patent
active
061435996
ABSTRACT:
A memory cell includes a transistor and a capacitor that is a doped polysilicon filled trench. A doped polycrystalline strap provides a low resistance connection between a source region of the transistor and the polysilicon fill and is shaped to overlie both a top surface and a side surface of the source region of the transistor.
REFERENCES:
patent: 5937292 (1999-08-01), Hammeri et al.
patent: 5942778 (1999-08-01), Oikawa
Beintner Jochen
Kim Byeong Y.
Radens Carl
Braden Stanton C.
Infineon Technologies North America Corp.
Tsai Jey
LandOfFree
Method for manufacturing memory cell with trench capacitor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing memory cell with trench capacitor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing memory cell with trench capacitor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1639936