Method for manufacturing memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S286000

Reexamination Certificate

active

06858498

ABSTRACT:
A method for manufacturing a memory includes the following steps. An insulating layer, a polysilicon layer and a mask layer are formed on a substrate in sequence. Next, the mask layer is etched to expose portions of the polysilicon layer, and to define a first patterned region, a second patterned region and a third patterned region located between the first and second patterned regions. The exposed portions of the polysilicon layer are located in the first and second patterned regions. The portion of the polysilicon layer exposed in the second patterned region is then etched. An ion implanting process is performed to implant ions into the substrate so as to form a first doped region in the second patterned region. The substrate is oxidized to form a first silicon oxide region in the first patterned region. The mask layer is then removed, and the polysilicon layer is etched to form a gate with using the first silicon oxide region as a mask. Finally, an additional ion implanting process is performed to implant ions into the substrate so as to form a second doped region.

REFERENCES:
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patent: 6174772 (2001-01-01), Hsieh et al.
patent: 6194269 (2001-02-01), Sung et al.
patent: 6200859 (2001-03-01), Huang et al.
patent: 6329685 (2001-12-01), Lee
patent: 6627946 (2003-09-01), Wang

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