Method for manufacturing mask ROM

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S278000

Reexamination Certificate

active

06902979

ABSTRACT:
A method for manufacturing a mask ROM of flat cell structure. The method includes the steps of: providing a semiconductor substrate having a flat cell array region and a peripheral circuit region; forming a first and a second mask patterns exposing a substrate portions corresponding to a diffusion layer formation region of the flat cell array region and a device isolation layer of the peripheral circuit region; ion-implanting an impurity in the exposed substrate portions; forming a trench by etching the exposed substrate portion peripheral circuit region; forming a linear oxide layer on the first and the second mask patterns and the surface of the trench, a diffusion layer on the flat cell array region, and a barrier oxide layer on the surface of diffusion layer in accordance with a thermal oxidation process; depositing an oxide layer on the linear oxide layer to fill up the trench; polishing the oxide layer to expose the surface of the first and the second mask patterns; and forming a diffusion layer on the flat cell array region and a trench type isolation layer on the peripheral circuit region by removing the first and the second mask patterns.

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patent: 6518131 (2003-02-01), Lim
patent: 6709933 (2004-03-01), Kim

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