Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-12-05
2000-11-14
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438626, 438629, 438631, 438738, H01L 214763, H01L 21302
Patent
active
061469955
ABSTRACT:
A method for forming interconnection plugs comprising the steps of providing a substrate having a dielectric layer formed thereon, wherein an opening exposing a pad area for connection with other structures is also formed in the dielectric layer. Next, a glue layer is formed over the pad area and the dielectric sidewalls of the opening. Subsequently, plug material is deposited into the opening forming a plug layer. This is followed by etching back the plug layer to return the plug material inside the opening to a level below the height of the dielectric layer. Then, a selective etching method having a high selectivity ratio between the dielectric layer and the plug layer is used to etch the dielectric layer. Finally, the dielectric layer and the plug layer are etched to almost the same level of height. The characteristic of this invention is the utilization of the higher etching r!ate of dielectric material with respect to the plug material so that the dielectric layer is etched back to the same level of height as the plug layer. Hence, the formation of recesses on the plug surface and the surface of subsequently deposited metallic layer is avoided.
REFERENCES:
patent: 4180432 (1979-12-01), Clark
patent: 5374591 (1994-12-01), Hasegawa et al.
patent: 5591673 (1997-01-01), Chao et al.
patent: 5872053 (1999-02-01), Smith
Jr. Carl Whitehead
Park James
Worldwide Semiconductor Manufacturing Corp.
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