Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-05-09
2006-05-09
Cao, Phat X. (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000
Reexamination Certificate
active
07041555
ABSTRACT:
Disclosed is a method for manufacturing a flash memory device. In a process of forming a flash memory cell and a select transistor through a process of forming a polysilicon layer for a floating gate, a process of forming a dielectric layer and a process of forming a polysilicon layer for a control gate, the dielectric layer is formed and the dielectric layer in a region where a select transistor will be formed is then removed, thereby forming a select gate line in which the polysilicon layer for the floating gate and the polysilicon layer for the control gate are electrically connected. Furthermore, in a process of forming a flash memory cell and a select transistor through a process of forming a polysilicon layer for a floating gate, a process of forming a dielectric layer and a process of forming a polysilicon layer for a control gate, forming an interlayer insulating layer on the entire structure and then forming a contact, the dielectric layer on the polysilicon layer for the floating gate in a region where a select transistor will be formed and the polysilicon layer for the control gate are all removed whereby the polysilicon layer for the floating gate and a contact plug are directly electrically connected.
REFERENCES:
patent: 5841163 (1998-11-01), Joo et al.
patent: 6777294 (2004-08-01), Park
patent: 2003/0222292 (2003-12-01), Joo et al.
patent: 2005/0205905 (2005-09-01), Rhodes
patent: 10-41487 (1998-02-01), None
Ahn Jung Ryul
Kim Jum Soo
Cao Phat X.
Doan Theresa T.
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
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