Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-04-26
2005-04-26
Graybill, David E. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S264000, C438S259000, C438S275000, C438S296000
Reexamination Certificate
active
06884682
ABSTRACT:
The present invention relates to a method of manufacturing a flash memory device. In a flash memory device formed by applying a self-align shallow trench isolation (SA-STI) scheme, a polishing process and a process for removing a nitride film are performed after oxide materials are buried in isolation trenches. Then, oxide films with an excellent planarization are formed, a first etching process is performed to selectively remove the oxide films in a low voltage transistor/cell area to a certain thickness, a second etching process is performed to remove the oxide films in a high voltage transistor area and the low voltage transistor/cell area until a poly-silicon layer for a floating gate is exposed. Therefore, protruding portions of element isolation films in the high voltage transistor area and the low voltage transistor/cell area are etched away to a certain thickness during the first and second etching processes so that a difference in EFH's between these areas can be reduced.
REFERENCES:
patent: 6284607 (2001-09-01), Patelmo et al.
patent: 6576517 (2003-06-01), Patelmo et al.
patent: 6759299 (2004-07-01), Lee et al.
Graybill David E.
Hynix / Semiconductor Inc.
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