Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-08-21
2007-08-21
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S257000, C438S268000, C257SE21645, C257SE29129
Reexamination Certificate
active
10872725
ABSTRACT:
The present invention relates to a method for manufacturing a flash memory device. A plurality of conductive layers and dielectric layers are etched in a single etch apparatus, thus forming a control gate and a floating gate. In a gate formation process in which a thickness of a floating gate is over 1500 Å, problems in short process time and short mass production margin in an existing process can be solved while completely stripping a dielectric layer fence.
REFERENCES:
patent: 6229176 (2001-05-01), Hsieh et al.
patent: 6455374 (2002-09-01), Lee et al.
patent: 2002/0171101 (2002-11-01), Hsu et al.
patent: 1020020048616 (2002-06-01), None
patent: 1020020096610 (2002-12-01), None
patent: 1020050009642 (2005-01-01), None
Ghyka Alexander
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
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