Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-06-26
1999-08-24
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
117102, 117923, 117925, 438257, 438700, 438706, 438719, H01L 21336
Patent
active
059435712
ABSTRACT:
For manufacturing fine structures, nuclei that define the dimensions of the fine structures are formed on the surface of a substrate in a CVD process upon employment of a first process gas that contains SiH.sub.4 and GeH.sub.4 in a carrier gas. The nuclei can be employed both as a mask, for example, when etching or implanting, as will as active or passive component parts that remain in the structure, for example, as charge storages in the dielectric of an EEPROM.
REFERENCES:
patent: 4698316 (1987-10-01), Corboy, Jr.
patent: 5158905 (1992-10-01), Ahn
patent: 5254503 (1993-10-01), Kenney
patent: 5259918 (1993-11-01), Akbar et al.
patent: 5340410 (1994-08-01), Endores et al.
patent: 5346846 (1994-09-01), Park et al.
Patent Abstracts of Japan, vol. 17, No. 295 (E-1377) Jun. 7, 1993, & JP 05-021798 dated Jan. 29, 1993.
Mine, T. et al, "Capacitance-Enhanced Stacked-Capacitor with Engraved Storage Electrode for Deep Submicron DRAMs", Japanese Journal of Applied Physics, (1989), pp. 137-140.
Sandip Tiwari et al, Volatile and Non-Volatile Memories in Silicon with Nano-Crystal Storage, Technical Digest of the International Electron Devices Meeting, (1995), pp. 521-524.
Garone et al., "Silicon vapor phase epitaxial growth catalysis by the presence of germane," Applied Physics Letters, vol. 56, p. 1275, 1990.
Maree et al., "Thin Film Ge-Si (111) Films: Study and Control of Morphology," Surface Science, vol. 191, p. 305, 1987.
Apetz. R. et al.: "Photoluminescence and Electroluminescence of SiGe Dots Fabricated by Island Growth," in Appl. Phys. Lett 66, Jan. 23, 1995, American Institute of Physics, pp. 445-447.
Eaglesham, D.J. et al.: "Dislocation-Free Stranski-Krastanow Growth of Ge on Si(100)," in Physical Review Letters, vol. 64, No. 16, Apr. 16, 1990, pp. 1943-1946.
Tiwari, Sandip et al.: "Volatile and Non-Volatile Memories in Silicon with Nano-Crystal Storage," in IEDM 95, pp. 521-525.
Franosch Martin
Lehmann Volker
Reisinger Hans
Schaefer Herbert
Stengl Reinhard
Hack Jonathan
Niebling John F.
Siemens Aktiengesellschaft
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