Method for manufacturing dual gate oxide layer

Details Method for manufacturing dual gate oxide layer Method for manufacturing dual gate oxide layer

1997-12-23

1999-11-16

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438762, H01L 21336, H01L 2131, H01L 21469

Patent

active

059857250

ABSTRACT:
A method for forming a dual gate oxide layer, which can be suitably applied to the surface of a shallow trench isolation structure, comprising the steps of providing a substrate that has a device isolation structure already formed thereon such as a shallow trench isolation. Next, a thermal oxidation process is carried out to form an oxide layer over the substrate and the isolation structure. A silicon nitride layer is then deposited on top of the oxide layer. In the subsequent step, the silicon nitride layer is patterned to cover portions of the oxide layer that lies in an input/output area. The method of this invention produces a better quality gate oxide layer over the device isolation structure and the substrate surface. Therefore, device problems caused by the deposition of a poor quality gate oxide in a conventional method can be greatly reduced.

REFERENCES:
patent: 5378645 (1995-01-01), Inoue et al.
patent: 5502009 (1996-03-01), Lin
patent: 5731238 (1998-03-01), Cavins et al.
patent: 5863819 (1999-01-01), Gonzalez
Wolf, S and Tauber, R.N., Silicon Processing for the VLSI Era, vol. 1 and 2, Lattice Press, vol. 1, pp. 534, 539; vol. 2 p. 45, 1986.

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