Method for manufacturing dual gate in semiconductor device

Details Method for manufacturing dual gate in semiconductor device Method for manufacturing dual gate in semiconductor device

2011-08-02

2011-08-02

Thomas, Toniae M (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S592000, C438S653000, C438S655000, C438S656000, C438S683000, C438S685000, C438S777000, C257SE21165, C257SE21168

Reexamination Certificate

active

07989281

ABSTRACT:
Provided is a method for manufacturing a dual gate in a semiconductor device. The method includes forming a gate insulating layer and a gate conductive layer on a semiconductor substrate, forming a diffusion barrier layer on the gate conductive layer, forming a barrier metal layer on the diffusion barrier layer, depositing a first gate metal layer on the barrier metal layer, forming a metal nitride barrier layer on a surface of the first gate metal layer by supplying nitrogen (N2) plasma on the first gate metal layer, forming a second gate metal layer on the metal nitride barrier layer, and forming a hard mask layer on the second gate metal layer.

REFERENCES:
patent: 6306743 (2001-10-01), Lee
patent: 6800543 (2004-10-01), Taguwa
patent: 6943416 (2005-09-01), Hu
patent: 7541269 (2009-06-01), Kim et al.
patent: 2005/0020045 (2005-01-01), Taguwa
patent: 2006/0208323 (2006-09-01), Anderson et al.
patent: 2007/0052043 (2007-03-01), Cha et al.
patent: 2007/0290227 (2007-12-01), Liang et al.
patent: 2008/0061386 (2008-03-01), Taguwa
patent: 2008/0081452 (2008-04-01), Kim et al.
patent: 2008/0157205 (2008-07-01), Sung et al.
patent: 2005-116693 (2005-04-01), None
patent: 10-0744108 (2007-07-01), None

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