Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-06-06
2006-06-06
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S678000, C438S623000, C438S638000
Reexamination Certificate
active
07056821
ABSTRACT:
A method for manufacturing a dual damascene structure, which forms a trench first, is described. The manufacturing method has following steps. First, a substrate with a plurality of semiconductor devices is provided. A first metal layer, a first etching stop layer, a dielectric layer, and a second etching stop layer are subsequently formed thereon. A trench is formed in the dielectric layer at a predetermined depth thereafter, and a sacrificial layer is filled therein and is next planarized. Then a photoresist layer is formed thereon for etching a via. Afterward the photoresist layer and the sacrificial layer are both removed. Following that, the first etching stop layer is etched through to expose the first metal layer. Finally, the via and the trench are filled with a second metal layer.
REFERENCES:
patent: 6924228 (2005-08-01), Kim et al.
patent: 2005/0014361 (2005-01-01), Nguyen et al.
Jou Juan-Jann
Lai Chia-Hung
Lee Yu-Hua
Yang Chin-Tien
Hoffman Wasson & Gitler
Lebentritt Michael
Taiwan Semiconductor Manufacturing Co. Ltd.
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