Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-12-18
1999-12-21
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438964, H01L 218242
Patent
active
060048468
ABSTRACT:
A method for manufacturing DRAM capacitor comprising the steps of providing a substrate having a transistor already formed thereon and an insulating layer covered on top, wherein the insulating layer has an opening exposing one source/drain region of the transistor. Next, a first conductive layer, a first hemispherical grained silicon layer and a material layer are sequentially formed over the insulating layer and the source/drain region exposed through the contact opening, and then followed by a patterning operation. After that, a second conductive layer, a second hemispherical grained silicon layer are sequentially formed over the device, and then etched to expose the insulating layer and the material layer. Subsequently, the material layer is removed to expose the first hemispherical grained silicon layer forming a lower electrode. Finally, a dielectric layer and an upper electrode are sequentially formed over the lower electrode. The characteristic of this invention includes an effective increase in the surface area of the capacitor, the lowering of profile height of the capacitor, and the prevention of spike formation and its associated problems.
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Chaudhari Chandra
United Microelectronics Corp.
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