Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-12-12
1998-09-01
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438273, 438527, 438530, 438307, H01L 21336
Patent
active
058010785
ABSTRACT:
A diffused channel insulated gate field effect transistor comprised of a gate isolation layer and a gate electrode positioned on an upper surface of a semiconductor substrate of a first conductivity type; a body region of a second conductivity type present in the semiconductor substrate lying below a part of the gate electrode, on at least one side thereof, and extending downwards to a first depth; a source region of said first conductivity type present in the body region, spaced away from the first end of the gate electrode, at the upper surface and extending downwards therefrom to a second depth, shallower than the first depth; and a lightly doped region of the first conductivity type present in the body region, at least partly between the source region and the gate electrode, extending downwards to a substantially shallower depth than the second depth.
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IBM Technical Disclosure Bulletin, vol. 26, No. 6, Nov. 1983, New York, US, pp. 3025-3026, Anonymous: "Simple Realization of an Edge-Doped FET".
Codella C. F., et al. "Halo Doping Effects in Submicron DI-LDD Device Design", International Electron Devices Meeting, Technical Digest, Washington, D.C., USA, 104 Dec. 1985, 1985 New York, NY, USA IEEE, USA, pp. 230-233.
SGS-Thomson Microelectronics S.A.
Trinh Michael
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