Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-12-04
2007-12-04
Lee, Hsien-Ming (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S413000
Reexamination Certificate
active
11039243
ABSTRACT:
Disclosed herein is a method of manufacturing a cell transistor which can achieve an improvement in a short-channel effect of a cell transistor as well as an improvement in a refresh characteristic of the transistor, and can also prevent a reduction in the threshold voltage of the transistor, in relation to DRAM memory cells with high integration. The method comprises the steps of forming a device isolation region, which defines a device separating region, on a silicon substrate, forming a barrier layer on the substrate formed with device isolation region, forming a hard mask, which defines a gate forming region, on the substrate formed with the barrier layer, forming a silicon epitaxial layer on a surface of the substrate through selective epitaxial growth of silicon constituting the surface of the substrate, formed with the hard mask and the barrier layer, and removing the hard mask.
REFERENCES:
patent: 5223447 (1993-06-01), Lee et al.
patent: 6693018 (2004-02-01), Kim et al.
patent: 6852559 (2005-02-01), Kwak et al.
patent: 6858490 (2005-02-01), Kim
patent: 2004/0126987 (2004-07-01), Kim
Hynix / Semiconductor Inc.
Lee Hsien-Ming
Marshall & Gerstein & Borun LLP
LandOfFree
Method for manufacturing cell transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing cell transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing cell transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3893787