Method for manufacturing and operating a non-volatile memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S259000, C438S264000, C438S266000

Reexamination Certificate

active

11181606

ABSTRACT:
A method for manufacturing and operating a nonvolatile memory in which a floating gate is formed on a silicon substrate to reduce the difference in heights between a memory region and a logic region so that a process margin is assured. The method includes forming first trenches having a designated depth and a second trench having a depth smaller than that of the first trenches, and filling the first and second trenches with an oxidation film; planarizing the oxidation film, and etching the oxidation film in the second trench so that the oxidation film remains at the central portion of the second trench; forming a tunnel oxidation film in the second trench from which the oxidation film is etched, and depositing a first polysilicon film thereon; etching the first polysilicon film back so that a 2-bit floating gate is formed in the second trench; removing the oxidation film in the second trench by wet etching, and forming a common source on the silicon substrate under the second trench by depositing a lower oxidation film and using the lower oxidation film as a buffer film; depositing a nitride film and an upper oxidation film on the resulting structure provided with the deposited common source; depositing a second polysilicon film on the entire surface of the upper oxidation film; and forming a control gate by etching the second polysilicon film.

REFERENCES:
patent: 5486480 (1996-01-01), Chen
patent: 5728593 (1998-03-01), Yun et al.
patent: 6881628 (2005-04-01), Rudeck
patent: 2004/0108542 (2004-06-01), Lin et al.
patent: 2004/0253787 (2004-12-01), Lee et al.

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