Method for manufacturing a wafer level chip scale package

Details Method for manufacturing a wafer level chip scale package Method for manufacturing a wafer level chip scale package

2007-03-27

2007-03-27

Graybill, David E. (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S652000, C438S653000, C438S665000

Reexamination Certificate

active

10690782

ABSTRACT:
A semiconductor wafer with semiconductor chips having chip pads and a passivation layer is provided. First and second dielectric layers are sequentially formed on the passivation layer. The first and second dielectric layers form a ball pad area that includes an embossed portion, i.e., having a non-planar surface. A metal wiring layer is formed on the resulting structure including the embossed portion. A third dielectric layer is formed on the metal wiring layer. A portion of the third dielectric layer located on the embossed portion is removed to form a ball pad. A solder ball is formed on the embossed ball pad. With the embossed ball pad, the contact area between the solder balls and the metal wiring layer is increased, thereby improving the connection reliability.

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