Method for manufacturing a vertical transistor that includes...

Details Method for manufacturing a vertical transistor that includes... Method for manufacturing a vertical transistor that includes...

2007-08-09

2009-12-22

Smoot, Stephen W (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S268000, C438S430000, C438S977000, C257SE21629, C257SE21643

Reexamination Certificate

active

07635622

ABSTRACT:
A manufacturing method of a semiconductor device includes: forming multiple trenches on a semiconductor substrate; forming a second conductive type semiconductor film in each trench to provide a first column with the substrate between two trenches and a second column with the second conductive type semiconductor film in the trench, the first and second columns alternately repeated along with a predetermined direction; thinning a second side of the substrate; and increasing an impurity concentration in a thinned second side so that a first conductive type layer is provided. The impurity concentration of the first conductive type layer is higher than the first column. The first column provides a drift layer so that a vertical type first-conductive-type channel transistor is formed.

REFERENCES:
patent: 6475864 (2002-11-01), Sato et al.
patent: 6693323 (2004-02-01), Sato et al.
patent: 6987299 (2006-01-01), Disney et al.
patent: 7075149 (2006-07-01), Sato et al.
patent: 7364994 (2008-04-01), Hshieh et al.
patent: 2005/0032291 (2005-02-01), Baliga
patent: 2005/0221547 (2005-10-01), Yamauchi et al.
patent: 2008/0017897 (2008-01-01), Saito et al.
patent: 2008/0050876 (2008-02-01), Matocha et al.
patent: 1-734-565 (2005-03-01), None
patent: A-2002-016250 (2002-01-01), None
patent: A-2003-303965 (2003-10-01), None
patent: A-2004-311673 (2004-11-01), None
patent: A-2005-317828 (2005-11-01), None
patent: A-2006-294968 (2006-10-01), None
patent: A-2007-13003 (2007-01-01), None

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