Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-02-15
2005-02-15
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S242000, C438S386000, C438S255000, C438S398000, C438S665000, C438S964000, C257S301000, C257S305000, C257S534000, C257S599000
Reexamination Certificate
active
06855596
ABSTRACT:
A method for manufacturing a trench capacitor includes the step of etching a shallow isolation trench in a two-step process flow. During a first etching step, an etch chemistry based on chlorine or bromine performs a highly selective etch for silicon. During a second step, the etch chemistry is based on SiF4and O2which rather equally etches polysilicon and the collar isolation. On top of the wafer, the deposition of silicon oxide on the hard mask predominates and avoids an erosion of the hard mask. On the bottom of the trench the conformal etching of polysilicon and collar isolation predominates. The method provides an economic process flow and is suitable for small feature sizes.
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Author not listed: “Process for Simultaneously Forming Poly/EPI Silicon Filled Deep and Shallow Isolation Trenches Having a CVD Oxide Cap”, IBM Technical Disclosure Bulletin, IBM Corp., vol. 33, No. 7, Dec. 1990 pp. 388-392.
Fichtl Gabriele
Haensel Jana
Metzdorf Thomas
Morgenstern Thomas
Greenberg Laurence A.
Huynh Andy
Infineon - Technologies AG
Locher Ralph E.
Stemer Werner H.
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