Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-06-25
2000-09-19
Hardy, David
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438199, 438200, 438201, 438210, 257390, H01L 2144
Patent
active
06121079&
ABSTRACT:
In DRAM comprising a read pass transistor, a write pass transistor and a storage transistor, a depletion transistor is connected to a source of the storage transistor. On a part of the source and drain of the depletion transistor, by forming an impurity region of same conductivity as that of the substrate on which the transistors are formed, a substrate voltage applied to the substrate is supplied to the storage transistor through the depletion transistor. An additional metal wire for connecting the source of the storage transistor to Vss voltage(ground voltage or substrate voltage)terminal and a contact hole area for such metal wire are not required. Accordingly, a high integration of the semiconductor can be accomplished and a a reduction of reliability thereof can be decreased.
Diaz José R.
Hardy David
Hyundai Electronics Industries Co,. Ltd.
LandOfFree
Method for manufacturing a semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing a semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1071995