Method for manufacturing a semiconductor device with ultra-fine

Etching a substrate: processes – Masking of a substrate using material resistant to an etchant – Mask resist contains inorganic material

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216 13, 438720, 438734, 438738, C23F 100

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060368756

ABSTRACT:
A method for ultra-fine patterning of a semiconductor device performs a first, anisotropic etching of a hard mask layer according to a pattern created by lithographic techniques to create lines in the hard mask layer having an initial width. A second, anisotropic etching is performed on the hard mask layer to narrow the lines further than otherwise possible with a single etching according to the patterns created by lithography. Using the narrowed lines created in the hard mask layer, a third, anisotropic etching is performed, this time on the conductor layer shadowed by the narrow lines of the hard mask layer. The third etching creates narrow lines in the conductor layer in accordance with the narrow lines of the hard mask layer.

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patent: 5045150 (1991-09-01), Cleeves et al.
Wolf, S. et al, "Silicon Processing for the VLSI Era--vol. 1: Process Technology", Lattice Press, Sunset Beach , CA , p. 526, Jan. 1986.

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