Method for manufacturing a semiconductor device with stabilizati

Details Method for manufacturing a semiconductor device with stabilizati Method for manufacturing a semiconductor device with stabilizati

1996-10-21

1999-07-20

Brown, Peter Toby

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438202, 438237, 438656, 438657, 438753, 148DIG9, 148DIG51, 148DIG131, 148DIG139, 1566431, 1566461, H01L 218249

Patent

active

059267054

ABSTRACT:
In a method for manufacturing an LDD-structured MOS transistor and a bipolar transistor, a gate insulating layer is formed on a MOS transistor region and a bipolar transistor region. Then, a gate electrode is formed on the MOS transistor region. Then, an insulating layer is formed on the entire surface, and as etched back by a reactive ion etching process to form a sidewall spacer. The MOS transistor region and the bipolar transistor region are etched by a wet etching process using the gate electrode and its sidewall spacer as a mask.

REFERENCES:
patent: 4485550 (1984-12-01), Koeneke et al.
patent: 5338698 (1994-08-01), Subbanna

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