Method for manufacturing a semiconductor device having reduced r

Details Method for manufacturing a semiconductor device having reduced r Method for manufacturing a semiconductor device having reduced r

1989-12-21

1997-08-05

Maples, John S.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438232, 438233, 438533, 438659, H01L 21441

Patent

active

056542410

ABSTRACT:
In a method for manufacturing a semiconductor device, metal ions are doped into the surface regions of diffusion layers or a diffusion layer forming region, thereby forming metal silicide layers of low resistance on only the diffusion layers. In a further method for manufacturing a semiconductor device, metal ions are doped into the surface regions of diffusion layers or a diffusion layer forming region and the upper surface of a gate electrode. Then, the structure is subjected to a process to make a silicide, thereby forming metal silicide layers of low resistance on only the diffusion layers and the gate electrode.

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patent: 4577396 (1986-03-01), Yamamoto et al.
patent: 4622735 (1986-11-01), Shibata
patent: 4677736 (1987-07-01), Brown
patent: 4731318 (1988-03-01), Roche et al.
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patent: 4912061 (1990-03-01), Nast
English-language Abstracts corresponding to the documents listed under AS, AT, and AU.
Japanese Search Report 63-324925, published Aug. 10, 1993.
"TiSi.sub.2 and TiN Formation By Ti-Ion Implantation and Their Applications to MOS Devices", Y Omura, et al. Extended Abstracts of the 20th Conference on Solid State Devices and Materials, Aug., 1988, pp. 93-96.

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