Method for manufacturing a semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S164000, C438S149000, C438S424000, C438S427000

Reexamination Certificate

active

07008834

ABSTRACT:
A method for manufacturing a semiconductor device includes: forming a first photoresist pattern on a second hard mask by use of ArF; forming first and second openings in the second hard mask by use of the first photoresist pattern as an etching mask; forming third and fourth openings in a first hard mask under the first and second openings; forming a partial trench (first trench) and a trench for a full trench (second trench) in an SOI substrate (semiconductor substrate) under the first and second openings; and forming the trench for a full trench into a full trench by etching the trench for a full trench through the fourth opening exposed through a third window of a second photoresist pattern.

REFERENCES:
patent: 6207534 (2001-03-01), Chan et al.
patent: 6498370 (2002-12-01), Kim et al.
patent: 2002/0022327 (2002-02-01), Park
patent: 2003/0151080 (2003-08-01), Hurley et al.
patent: 2004/0092082 (2004-05-01), Terahara et al.
patent: 2004/0092115 (2004-05-01), Hsieh et al.
patent: 2001-168337 (2001-09-01), None
“Impact of 0.10 μm SOI CMOS with Body-Tied Hybrid Trench Isolation Structure to Break Through the Scaling Crisis of Silicon Technology,” pp. 467-470, Yuuichi Hirano et al., IEDM 2000.

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