Method for manufacturing a non-volatile memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S149000, C438S200000, C438S201000

Reexamination Certificate

active

10983443

ABSTRACT:
An EEPROM device manufacturing method is disclosed. The method includes the steps of oxidation, polysilicon deposition, and etching to form first polysilicon layers of a select transistor and a floating gate electrode. The method also includes a second polysilicon deposition step followed by an etching step to form a logic gate electrode and a control gate electrode at the same time. This method prevents damage to the silicon substrate and reduces the number of process steps compared to conventional manufacturing methods.

REFERENCES:
patent: 5134583 (1992-07-01), Matsuo et al.
patent: 5550072 (1996-08-01), Cacharelis et al.
patent: 5898616 (1999-04-01), Ono
patent: 6376312 (2002-04-01), Yu

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