Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-04-16
2000-08-08
Fahmy, Wael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438519, 438585, 438691, 257402, H01L 21336
Patent
active
061001473
ABSTRACT:
A process for manufacturing a high performance transistor with self-aligned dopant profile. The process involves forming a source/drain mask pattern on a substrate. With a first implant material, unmasked portions of the substrate are doped to form source/drain regions of the substrate. The source-drain mask is removed and an oxidation layer is grown, where portions of the oxidation layer formed from doped regions of the substrate have heights that are greater than heights of portions of the oxidation layer formed from un-doped regions of the substrate, thereby forming a gate mask. The doped portions of the substrate are self-aligned with gate regions of the substrate. The gate regions are doped, and gate electrodes are formed. The gate mask is removed to expose source/drain regions of the substrate for further fabrication.
REFERENCES:
patent: 5116771 (1992-05-01), Karulkar
patent: 5391510 (1995-02-01), Hsu et al.
patent: 5399508 (1995-03-01), Nowak
Stanley Wolf and Richard N. Tauber, Silicon Processing for the VLSI Era, vol. 2, pp. 144-152, 182-188, 318, 332-333, 419-439, Dec. 1990.
Stanley Wolf and Richard N. Tauber, Silicon Processing for the VLSI Era, vol. 3, The Submicron MOSFET pp. 367-407, Dec. 1995, Publication U.S.
Gardner Mark I.
Gilmer Mark C.
Advanced Micro Devices , Inc.
Coleman William David
Fahmy Wael
LandOfFree
Method for manufacturing a high performance transistor with self does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing a high performance transistor with self, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a high performance transistor with self will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1149590