Method for manufacturing a floating gate in a flash memory...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S264000, C438S266000

Reexamination Certificate

active

06372576

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
A method of manufacturing a floating gate in a flash memory device is disclosed. More particularly, a method of manufacturing a floating gate in a flash memory device, which can minimize the size of the device without damaging a polysilicon film and a field oxide film is disclosed.
2. Description of the Prior Art
The size of a flash memory device, in which a floating gate and a control gate are stacked to form a word line, is determined by the distance between the floating gates formed to be overlapped with a given region on a field oxide film. That is, in order to reduce the size of the device, the distance between the floating gates must be reduced. Though various methods have been proposed, they cause many problems when being applied in a mass production process, and, as a result most of which have not implemented.
As one example, a method by will be explained by which the distance between the floating gates is made less 0.15 &mgr;m using a relatively large design rule ranging from 0.35 &mgr;m to about 0.25 &mgr;m without additional equipment.
A tunnel oxide film, a polysilicon film and a first nitride film are sequentially formed on a semiconductor substrate on a given region of which a field oxide film is formed. Next, the first nitride film is patterned by lithography process and etching process using a mask for floating gate. The first nitride film is patterned to be overlapped with a given region of the field oxide film. Then, a spacer is formed at the sidewall of the first nitride film by means of a second nitride film. Thereafter, the polysilicon film and the tunnel oxide film are etched using the nitride film pattern in which the spacer is formed as a mask. Thus, the nitride pattern is removed to form a floating gate.
If the floating gate is formed by the above process, the nitride film and the nitride spacer are removed by means of wet etch process using H
3
PO
4
. However, the underlying polysilicon film is damaged by the H
3
PO
4
, which may critically affect the operation of the device.
In order to solve this problem, a CVD oxide film is used instead of the nitride film and a CVD oxide film wet etch or dry etch process using BOE or HF is employed. However, another problem is associated with this technique in that the field oxide film is exposed by the etching process is consequently etched.
SUMMARY OF THE DISCLOSURE
A method of manufacturing a floating gate in a flash memory device, which can minimize the distance between floating gates using a relatively large design rule is disclosed.
Further, a method of manufacturing a floating gate in a flash memory device, which can minimize the distance between floating gates without damaging a polysilicon film and a field oxide film is disclosed.
The disclosed method is characterized in that it comprises the steps of forming a tunnel oxide film and a polysilicon film on a semiconductor substrate on a portion of which a field oxide film is formed; forming a first PSG film on the polysilicon film and then patterning the first PSG film; forming a second PSG film on the entire structure and then blanket-etching the second PSG film, thus forming a spacer at the sidewall of the first PSG film pattern; etching the polysilicon film and the tunnel oxide film by means of etching process, using the first PSG film pattern at which the spacer is formed as a mask; and removing the first PSG film pattern and the spacer.


REFERENCES:
patent: 5874759 (1999-02-01), Park
patent: 5915176 (1999-06-01), Lim

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