Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-06-06
1997-04-01
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438267, 438589, H01L 218247
Patent
active
056165102
ABSTRACT:
A highly compact nonvolatile solid state memory core is provided that stores and reproduces both digital and analog signals for multimedia applications. The memory core includes vertical electrically erasable and programmable read only memories (EEPROM) cells having, for example, a stacked gate or a split channel configuration. An array of EEPROM cells on the same chip is prewritten and is used as a reference for digital-analog conversions and for memory cell programming. An intelligent write method allows each memory cell to either store an analog signal or multiple digital signals. Based on the previously stored signal, the intelligent write method determines whether to charge or to discharge the floating gate associated with the selected memory cell. Thus, full erasure is not required prior to programming each memory cell. The present invention significantly increases the density of memory cell arrays while prolonging the useful life of the array.
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Atsumi et al., "Fast Programmable 256K Read Only Memory with On-Chip Test Circuits", IEEE Journal of Solid State Circuits, vol. SC-20, No. 1, pp. 422-427, Feb. 1985.
Chaudhari Chandra
MacPherson Alan H.
Millers David T.
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