Method for making an active pixel sensor

Details Method for making an active pixel sensor Method for making an active pixel sensor

2001-09-07

2003-04-01

Zarabian, Amir (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S200000, C438S232000, C438S306000

Reexamination Certificate

active

06541329

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention provides a method for making an active pixel sensor, especially an active pixel sensor with a photodiode having an increased quantum efficiency (QE).
2. Description of the Prior Art
An active pixel sensor is a semiconductor device comprising an N-type channel metal-oxide semiconductor (NMOS) transistor, or a complementary metal-oxide semiconductor (CMOS) transistor, and a photodiode. It is commonly used as an image sensor for a photoelectric product, such as a camcorder or a scanner.
In current semiconductor processes, the metal-oxide semiconductor device in the active pixel sensor, the active pixel sensor region including photodiode, and the periphery circuit which includes other devices, are all made on a single chip. The periphery circuit not only comprises a plurality of CMOS transistors composed of an N-type channel metal-oxide semiconductor (NMOS) device and a P-type channel metal-oxide semiconductor (PMOS) device, but also comprises devices like resistors and capacitors. In the image sensor fabrication process, the CMOS transistors in the periphery circuit, the N-type: channel metal-oxide semiconductor device, and the photodiode in the active pixel sensor region all need to be integrated together. Therefore, an N-well ion implantation process in a typical CMOS transistor process is used as the first ion implantation process in the fabrication process of an image sensor chip.
Please refer to FIG.
1
.
FIG. 1
is a schematic diagram of a prior art active pixel sensor
10
. A photosensing area
20
for the prior art active pixel sensor
10
is positioned on a semiconductor wafer
11
. The semiconductor wafer
11
comprises a silicon substrate
12
and P-well
14
positioned on the silicon substrate
12
. The active pixel sensor
10
comprises an N-type channel metal-oxide semiconductor (NMOS) transistor
16
positioned on the surface of the p-well
14
, and the photosensing area
20
positioned on the surface of the P-well
14
for electrically connecting to a drain of the NMOS transistor
16
. The semiconductor wafer
11
further comprises a plurality of field oxide layers
18
on the surface of the silicon substrate
12
. The field oxide layers
18
surround the photosensing area
20
and serve as an insulating material to prevent short-circuiting between the photosensing area
20
and other devices.
Please refer to FIG.
2
.
FIG. 2
is a schematic diagram of the prior art active pixel sensor
10
with a common area shared by a drain
17
and a doping area
22
. In some embodiments, the source or drain of the NMOS
16
shares a common area with the doping area
22
in the photosensing area
20
in order to shrink the area of the active pixel sensor
10
. The drain
17
is a high concentration doping area (N
+
), and the doping area
22
is a low concentration doping area (N
−
).
As described above, the method for forming the prior art active pixel sensor
10
is to perform an N-well ion implantation process to the image sensor chip first. The N-well ion implantation process implants phosphorous ions with a dosage of approximately 10
13
/cm
2
into the chip by utilizing an energy ranging from 100~200 eV to form an N-well. Then, a P-well,
14
ion implantation process is performed to the active pixel sensor region in the image sensor chip to form a P-well
14
, The P-well
14
ion implantation process is a high energy boron ion implantation process with a dosage slightly higher than 10
13
/cm
2
. Since the N-well ion implantation process, which is a blanket implant process, is performed before the P-well ion implantation process to neutralize the N-well ion implantation process to form a P-well
14
, the P-well ion implantation process is also called a compensation ion implantation process.
However, the two high-energy ion implantation processes usually cause damage of the single crystal structure on the surface of the P-well
14
, which has drawbacks, such as increasing leakage current and inferior product reliability. Please refer to FIG.
3
.
FIG. 3
is a schematic diagram of an N-well and P-well ion implantation for the prior art image sensor chip
24
. The relative sites for these two ion implantation processes for the chip are shown in FIG.
3
A. The N-well ion implantation process is performed to the whole image sensor chip
24
. That is, the diagonal line region in
FIG. 3A
, which includes the whole active pixel sensor area
26
. An area covered by an N-well mask is the area for forming the PMOS devices in the periphery circuit region. As shown in
FIG. 3B
, the P-well ion implantation process is performed to the whole image sensor chip
24
outside the N-well mask
28
, that is, the diagonal line region in
FIG. 3B
(the P-well ion implantation region), which also includes the entire active pixel sensor area
26
.
The performance of a photodiode in terms of photosensitivity is characterized by leakage current. The light-induced current (light current) in the photosensing area of a photodiode in the presence of light represents a signal, while the current (dark current) in the photosensing area of a photodiode not in the presence of light represents noise. The photodiode utilizes signal-to-noise ratios to process signal data. The method to improve the quality of a photodiode is, currently, to increase the intensity of the signal represented by the leakage current in the photosensing area in the presence of light hence increase the contrast of signal by an increased signal-to-noise ratio, in order to enhance the sensitivity of the photosensing area of the photodiode, which further improves the quality of the photodiode.
Please refer back to FIG.
1
. With arsenic ions in the photosensing area
20
, a depletion region
24
is formed along the PN junction between the doped region
22
and the adjacent P-well
14
. The method performs an ion implantation process, utilizing a high dosage of arsenic ions as the major dopant. The ion implantation process forms an N-type ion doping area
22
on the surface of the P-well
14
, so the leakage current passing through the depletion region
24
with and without light represents signal and noise, respectively. The dotted lane region marked with slanting lines in
FIG. 1
illustrates the depletion region
24
. Since the N-type doping area
22
in the photosensing area
20
of the photodiode
10
utilizes high dosage arsenic ions as the major dopant, the doping area
22
formed completely by heavy doping processes will cause the depletion area
24
to have a narrower width when joined with the P-well
14
to form a PN junction. This decreases the area for the actual active region in the photosensing area
20
, and decreases the light current passing through the depletion region
24
when the photosensing area
20
of the photodiode
10
is in the presence of light. Furthermore, the border between the edge of the dosing area
22
underneath the field oxide layer
18
and the P-well
14
tends to have larger leakage current for the PN junction when in the dark. Noise is therefore increased, and the signal to noise ratio is worsened, decreasing the signal sensitivity of the photosensing area
20
.
In order to avoid decreasing of the actual active region caused by heavy doping processes, a structure with a common area shared by the source or drain and doping area
22
is utilized to clearly improve over the structure depicted in FIG.
1
. Please refer to FIG.
2
. The drain
17
, with a high doping concentration, is not joined with the P-well
14
. Only the doping area
22
, with a lower doping concentration, is directly joined with the P-well
14
.
However, the wafer structure destruction problem incurred by two high energy ion implantation processes cannot be avoided in the structure of FIG.
2
. Please refer to FIG.
4
.
FIG. 4
is a schematic diagram of a prior art partial P-well active pixel sensor
30
. The photosensing area
40
of the prior art active pixel sensor
30
is positioned on a semiconductor wafer
31
. The semiconductor wafe

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