Method for making a variable length LDD spacer structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438304, H01L 218238

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active

056542127

ABSTRACT:
A method for making a variable length LDD spacer structure is disclosed. A first insulation layer (i.e., gate oxide) is formed on a semiconductor device having a P-well and an N-well provided in a substrate. A first and a second polysilicon gate are formed on the P-well and the N-well respectively wherein the first insulation layer is interposed between the wells and the gates. A second insulation layer is formed over the first and second gates. N-type impurity ions are selectively implanted to form lightly doped N-type diffusion regions in the P-well. Similarly, P-type impurity ions are selectively implanted to form lightly doped P-type diffusion regions in the N-well. A polysilicon spacer is formed on both side walls of each of the gates. Each spacer covers a portion of the lightly doped N-type and P-type diffusion regions. N-type impurity ions are selectively implanted in a portion of the lightly doped N-type diffusion regions not covered by the spacers. This forms N-type source and drain regions in the P-well adjacent to the lightly doped N-type diffusion regions which have a final length equaling the length of the spacers. Next, the spacers are oxidized or nitridized which enlarges the spacers. P-type impurity ions are selectively implanted in a portion of the lightly doped P-type diffusion regions not covered by the enlarged spacers. This forms P-type source and drain regions in the N-well adjacent to the lightly doped P-type diffusion regions which have a final length equaling the length of the enlarged spacers.

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