Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2001-08-10
2003-03-11
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S695000, C438S697000, C438S712000, C438S723000, C438S761000, C438S781000, C438S618000, C438S620000, C438S622000, C438S626000, C438S627000, C438S628000, C427S255280, C427S255390, C427S255393, C427S569000, C427S578000, C427S579000
Reexamination Certificate
active
06531412
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor processing, and more particularly to a process for forming a blanket dielectric layer to fill gaps between device elements.
BACKGROUND OF THE INVENTION
In the manufacturing of semiconductor devices, as the dimensions have shrunk, it has become more challenging to provide dielectric film layers that provide adequate electrical isolation between interconnect features and device components in order to minimize RC delay and crosstalk. One method of doing this is to provide dielectric layers using materials having lower dielectric constants (low-k dielectrics) than conventional dielectric materials such as silicon dioxide (SiO
2
) or silicon nitride. Low-k dielectrics typically have dielectric constants below about 4, where air has a dielectric constant of 1.
In particular, at the start of the fabrication of a back end of line (BEOL) module which contains the interconnect metal levels, a dielectric layer is typically provided between the devices or features, such as gate conductor stacks, on the substrate, or front end of line (FEOL), and the first layer of metal in the interconnect level or BEOL. This dielectric layer between the device level and the interconnect level is known as the pre-metal dielectric (PMD). The process of forming this PMD is referred to hereinafter as a middle of line process, or MOL process, as opposed to the BEOL processes used to form the intermetal dielectrics (IMD) that separate the metal layers.
Methods of depositing low-k dielectric blanket layers have included spin-on, chemical vapor deposition (CVD), and plasma-enhanced chemical vapor deposition (PECVD), with PECVD more recently preferred. PECVD processes include the use of organosilicon precursors, such as methylsilane (1MS), trimethyl silane (3MS) and tetramethylsilane (4MS), with various oxidizers. However, the CVD processes, in particular PECVD, may not adequately fill the spaces or gaps between existing metal features, and may leave voids in the dielectric blanket layer which can cause problems such as micro-cracking, lack of structural support, trapping of gases or moisture or allow subsequent metal fill processes to connect nearby voids which can result in shorted device elements. Although films provided by spin-on deposition may adequately fill spaces or gaps, these films are usually porous and would be incompatible with other MOL processing steps by being susceptible to problems such as those mentioned above. The problem of adequate gap fill can be particularly difficult if the aspect ratio (AR), which is the ratio of height to width of the gaps, is above about 1.0. For example, referring to
FIG. 1
, device structures
130
are formed over a doped region
120
on a substrate
110
. The device structures
130
, such as gate conductor stacks, are separated by width W and each have height H. Therefore the gap
160
separating the device structures
130
has an aspect ratio (AR) of H/W. If H is greater than W, then the AR is greater than 1 and a blanket dielectric layer
140
formed by a conventional PECVD process will not completely fill the gap
160
, leaving a void
150
, which can cause problems such as structural and electrical defects as mentioned above.
PECVD methods for depositing low-k dielectric layers for BEOL levels have been suggested which use a carbon-containing precursor, for example, a cyclosiloxane such as tetramethylcyclo-tetrasiloxane (TMCTS) or methylsilanes, with oxygen. Low-k dielectrics will also be required at the MOL level. PECVD can provide deposition rates which are fast enough (in the range of 100's to 1000's Å/min) for BEOL applications which must operate at temperatures below about 400° C., and as low as 300° C., because of the presence of metal features. However, PECVD solutions at the MOL level are not easily utilized, because PECVD processes may leave voids in high aspect ratio gaps, where the gap AR exceeds about 1.0. In addition, plasma processing is not a preferred fill method for MOL as it may cause charge damage to gate oxides.
Thermal CVD processes do not require the use of plasmas to deposit dielectric layers. Sub-atmospheric thermal CVD (SACVD) and low pressure thermal CVD have been used for providing conformal deposition of dielectrics, in which O
3
and O
2
are respectively used as oxidizing agents. The pressure in SACVD is in the range from about 50 to 800 Torr, and usually between about 200 to 760 Torr. Low pressure CVD typically involves pressures below about 10 Torr. Low pressure CVD will not provide good gap filling results for chemistry such as oxygen plus an organometallic or organosilicon precursor such as TMCTS. Good gap filling typically results through the use of SACVD at pressures above about 200 Torr, and more likely above about 600 Torr. However, using low-k materials for AR greater than 1, SACVD may also leave voids depending on the shape of the gap to be filled.
It would be desirable to use a post-deposition glass reflow step at a low reflow temperature to fill voids left after deposition of a low-k film with minimal heat treatment to avoid thermal damage. For example, in the case of conventional (high-k) dielectric films where controlling the dielectric constant has not been a design requirement, it is known that the addition of dopants may lower the temperature required to reflow the film. However, because the process conditions for depositing low-k films that would also provide good gap-filling results are quite sensitive to the composition of reactant gases and the structure of the gaps to be filled, the addition of dopants which reduce the reflow temperature would not necessarily preserve the desired low-k and gap-filling properties of the film, and may require significant experimentation to achieve the desired results.
Thus, there is a need for a non-plasma low-k oxide CVD process that can provide good gap-filling results for AR greater than 1, that avoids charge damage, that can getter alkali elements, that can be reflowed with minimal heat treatment to avoid thermal damage to the underlying device elements, and that provides a film having the desired low-k property.
Sukharev (U.S. Pat. No. 5,710,079, hereinafter, the Sukharev patent) discloses a method for depositing silicon dioxide films to prevent the formation of voids in gaps by CVD with an organometallic compound, such as tetraethylorthosilicate (TEOS), BPTEOS, TEB, TMOP, OMCTS, HMDS, TMCTS, or TRIES, and which includes ozone and the use of ultraviolet radiation (UV) to increase the deposition rate by increasing the concentration of hydroxyl radicals in order to avoid the formation of voids and improve gap-fill. However, the increased concentration of hydroxyl radicals may lead to a porous film that is incompatible with MOL processing and increased concentration of hydroxyl radicals will result in reduced carbon incorporation in the film. Since carbon incorporation is required to achieve a low-k oxide, the Sukarev patent does not provide a solution for depositing low-k dielectric films that provide good gap filling results. Moreover, the use of UV radiation to increase deposition rates may require modification of standard reaction chambers and may increase the cost of processing.
Yuan (U.S. Pat. No. 5,855,957, hereinafter, the Yuan patent) discloses a method for depositing an oxide thin film using an atomospheric pressure thermal CVD (APCVD) process including ozone (O
3
) which can provide uniform step coverage. The Yuan patent discloses the use of precursors such as tetraethoxysilane (TEOS), hexamethyldisilazane (HMDSO), octamethylcyclotetrasiloxane (OMCTS), 2,4,6,8-tetramethylcyclotetrasiloxane (TMCTS), substances of the general formula SiH
x
(OR)
4-x
where “R” is an alkyl group or its oligomers and x=0, 1, 2, or 3, and other chemicals such as boron, phosphorous, fluorine containing sources and combinations thereof. The method of the Yuan patent discloses that uniform step coverage or gap fill can be provided for AR up to about 3. In addition, the preferred embodiment of the Y
Conti Richard A.
Edelstein Daniel C.
Lee Gill Yong
Berry Renee R.
C. Li Todd M.
LandOfFree
Method for low temperature chemical vapor deposition of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for low temperature chemical vapor deposition of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for low temperature chemical vapor deposition of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3078815