Method for localization and generation of short critical...

Details Method for localization and generation of short critical... Method for localization and generation of short critical...

2007-07-17

2007-07-17

Kerveros, James C (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S741000

Reexamination Certificate

active

10838535

ABSTRACT:
A method for localization and generation of short critical sequence uses an automatic test equipment to test an electronic device (e.g., memory device) by circuit simulation to localize and re-generate a very short critical sequence from a set of long worst-case pattern. The method includes defining a failure mechanism condition for search and localization process and re-production of the short critical sequence based on a mutation process from the critical sequence detected from a step (I) phase and number of pattern defined in population using a genetic algorithm step (II) phase.

REFERENCES:
patent: 5708774 (1998-01-01), Boden
patent: 5745501 (1998-04-01), Garner et al.
patent: 6810372 (2004-10-01), Unnikrishnan et al.
patent: 2003/0154432 (2003-08-01), Scott et al.

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