Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2006-07-31
2009-06-23
Bragdon, Reginald G (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S166000, C713S001000
Reexamination Certificate
active
07552307
ABSTRACT:
A memory has a set of address spaces to which token data is written and read. Each address space has a token status bit. A token generator allocates token data to the memory address spaces. Upon a reset occurring, a logic circuit provides logic “0” to the token generator disabling status bit checking control so that all the tokens can be issued sequentially. New token data is allocated to the address spaces sequentially and the respective status bit is updated or maintained as logic “1”. When all address spaces have been allocated, the logic circuit provides the actual state of the status bit to the token generator to control subsequent allocations.
REFERENCES:
patent: 5893162 (1999-04-01), Lau et al.
patent: 6529519 (2003-03-01), Steiner et al.
Ambilkar Shridhar Narasimha
Kurup Girish Gopala
Misra Ashutosh
Bragdon Reginald G
Coca T. Rao
England Anthony V S
International Business Machines - Corporation
Ruiz Aracelis
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