Method for increasing adhesion ability of dielectric...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S623000, C438S628000, C438S763000, C438S789000, C438S790000

Reexamination Certificate

active

06677231

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a method for manufacturing the semiconductor device, and more particularly to a method for improving adhesion ability of the dielectric material.
2. Description of the Prior Art
When semiconductor devices of integrated circuits (IC) become highly integrated, the surface of the chips cannot be supplied with enough area to make the interconnects. For matching up the requirement of interconnects increases with shrinkage of Metal-Oxide-Semiconductor (MOS) devices, and thus many designs of the integrated circuit have to use the dual damascene method. The three-dimensional structure of multi-level interconnects is used at present in the deep sub-micron region, and inter-metal dielectric (IMD) as the dielectric material which can be used to separate from each of the interconnects. A conducting wire, which connects the upper and the lower metal layers, is called the via plug in the semiconductor industry. In general, if an opening forms in the dielectric layer that is exposed to devices of the substrate in the interconnects, it is called a via hole.
The skill of the dual damascene is a method for forming the via and the interconnects. For the dual damascene application, the material of the dielectric layer generally uses low-K material. The low-K dielectric material is popular to apply the copper (Cu) dual damascene process to decrease resistance capacitance (RC) delay time of the interconnect material below 0.13 &mgr;m generation. Moreover, additional benefits of using low dielectric material are lowering power dissipation (since power dissipation is proportional to capacitance) and reducing cross talk (electrical coupling between metal leads alters the threshold voltage that controls transistor operation)
Cross-sectional views of a process for forming a dual damascene of the known prior art are illustrated in
FIG. 1A
to FIG.
1
E. First of all, a diffusion and/or etched stop layer
110
is formed on the substrate
100
, and a first dielectric layer
120
is formed over the barrier layer
110
. An etching stop layer
130
is then formed over the first dielectric
120
. Next, a second dielectric layer
140
is formed over the etching stop layer
130
. Then a first photo-resist layer
150
is defined on the second dielectric layer
140
to form a deep pattern area. The dry etching process of the deep pattern is performed by the first photo-resist layer
150
as a mask to punch through the second dielectric layer
140
, the etching stop layer
130
and the first dielectric layer
120
, while a via hole
160
is formed. After the first photo-resist layer
150
is removed, a second photo-resist layer
170
is defined on the second dielectric layer
140
to form a shallow pattern area, while the partial surface of the second dielectric layer
140
and the via hole
160
are exposed, wherein the horizontal size of the shallow patterns area is greater then the horizontal size of the deep patterns. Dry etching of the shallow patterns is performed by means of the second photo-resist layer
170
as a mask, while the exposed partial surface of the second dielectric layer
140
is removed by the etching stop layer
130
as an etching terminal point to form a trench
180
that has a horizontal size greater than the horizontal size of the via hole
160
. The second photo-resist layer
170
is then removed to form the opening of the damascene
160
and
180
. Finally, an interconnect process is performed. Since the above processes are well known in the prior art, which are not the focus of the present invention, they will not be described in greater detail.
In the conventional dual damascene process, the material of the dielectric layer is generally composed of organic low-K material, wherein the organic low-K material has a chemical structure, such as amine, imine, hydroxyimine, or aromatic hydrocarbon polymer. The material of the etching stop layer or barrier layer is generally composed of an inorganic material, such as SiN, SiON, SiC and SiO
2
. For the low-K material, in terms of deposition techniques, both spin-on and chemical vapor deposition (CVD) are workable, with key questions remaining around the issues of technological performance. The adhesion between the organic polymer and the inorganic layer is one of the key concerns for process integration. The hydrophilic surface is shown in
FIG. 2A
, the contact angle &thgr;
1
of water drop
220
that is absorbed on the underlayer
210
tends to be smaller as the hydrophilic behavior is getting stronger, and the hydrophilic surface is not favorable to adhesion of the surface with neighboring layer. On the contrary, if there is a has hydrophobic surface of underlayer
210
, the contact angle &thgr;
2
of water drop
220
that is absorbed on the underlayer
210
is much larger than contact angle &thgr;
1
, the surface tension dominates and easily eliminates, and thus the adhesion ability would be enhanced between the organic polymer and the inorganic dielectrics thereon.
Due to the nature of the high polar surface that exists in inorganic dielectrics, there is exhibited a hydrophilic ability. This would be incompatible with organic polymer that exhibits the hydrophobic behavior. In other words, the bonding is poor between the organic layers and the inorganic layers, so that the interconnect structures could be destroyed in the follow-up thermal process, for example, by thermal expansion mismatch-induced stress, or by thermal cycles. One of the basic concepts for improving the adhesion of low-K material and adjacent inorganic layers is introducing a new surface with much less polar surface to be compatible with organic polymers, leading to the increase of adhesion or bonding ability.
To improve the adhesion ability, typically, removal of the high polar surface is a basic requirement. Therefore, introducing an interlayer connect of the surfaces together with organic function group and an inorganic bond, is needed. In the conventional process, the method for forming the interlayer is spin-on coating. A liquid source of an adhesion promoter, such as some commercial product, has been available, recently. However, in spin-on coating, due to the fact that the ultra thin film is transparent in nature, it is very difficult to distinguish whether the coating of the adhesion promoter is good or not. On the other hand, through spin-on coating the coating quality could be easily affected by the surface status and by defects, such as striations caused by a large particle.
In accordance with the above description, a new and improved method for increasing the adhesion ability of dielectric material is therefore necessary, so as to raise the yield and quality of the follow-up process.
SUMMARY OF THE INVENTION
In accordance with the present invention, a new method of semiconductor process is provided that substantially overcomes drawbacks of the above mentioned problems which arise from conventional methods.
Accordingly, it is an object of the present invention to provide a new method for increasing the adhesion ability of dielectric material. The present invention introduces an interlayer between the low-K organic material and its adjacent inorganic material for connecting the surfaces together with the organic group and the inorganic bond, so as to avoid destroying the interconnect structures in the subsequent thermal processes. Thus, the method of the present invention is effective in raising the quality of the process.
Another object of the present invention is to provide a method for increasing the adhesion ability of the dielectric material. The present invention introduces a new adhesion material as an interphase material for having a good connection or bonding in each interface of both the organic polymer and the inorganic layer (hardmask or barrier layer), instead of the current liquid source adhesion promoter. The new adhesion material, such as methyltriacetoxysilane (MTAS), comprises a C—H group that is applied to the polymer surface and a siloxane (Si—O)

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