Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-07-29
2004-09-28
Zarneke, David A. (Department: 2829)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S660000, C438S677000, C438S906000, C438S963000
Reexamination Certificate
active
06797618
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This disclosure relates to a method for forming a silicide film of a semiconductor device, and more particularly to a method for forming a silicide film of a semiconductor device that can reduce a contact resistance and improve a performance of the semiconductor device.
2. Description of the Related Art
In a rapidly developing information society, highly integrated semiconductor devices having rapid data transmission rates are demanded to more quickly process data. Very minute patterns having a multi-layered structure are also required to fabricate the highly integrated semiconductor device. In these cases, contacts should be formed to electrically connect one pattern with another underlying pattern. As the semiconductor device becomes highly integrated, the window of contact for a connection between the patterns decreases in size. When polysilicon is employed as a material for forming the contact, the contact may have a high contact resistance or a high sheet resistance. As a result, the semiconductor device including the contact may not operate at a high performance speed and may exhibit high power consumption.
To solve the above-mentioned problems, a metal silicide including a compound of metal and silicon has been formed in an active region of a semiconductor device where a contact is formed, for example, source/drains region of the semiconductor device. A process for forming the metal silicide film is referred to as a silicidation process. In the silicidation process, a metal, for example, titanium (Ti), nickel (Ni) or cobalt (Co), is deposited on an underlying layer in the active region, and then is thermally treated so that titanium silicide, nickel silicide, or cobalt silicide can be formed on the underlying layer when silicon exists in the underlying layer. As for a semiconductor device having a design rule of about 0.25 &mgr;m, cobalt silicide may be widely used as the metal silicide film because cobalt silicide has a poor dependence on a critical dimension (CD) of a gate of the semiconductor device. For example, U.S. Pat. No. 6,303,503 to Kamal et. al. discloses a method for forming cobalt silicide in an active region of a semiconductor device.
A cobalt silicidation process may be generally performed as follows.
After a region where a cobalt silicide film is positioned is defined in a substrate on which a transistor is formed, a wet cleaning process is executed to remove impurities and a native oxide film on the substrate.
The cleaned substrate is loaded in a chamber of a radio frequency (RF) sputter apparatus. In the radio frequency sputter apparatus, a radio frequency plasma etching process is performed in order to remove from the substrate remaining impurities that may not be completely removed during the wet etching process or a native oxide film that may form again on the substrate during the substrate transfer. The radio frequency process is also performed to improve morphologies of the substrate.
A cobalt film is formed in-situ on the substrate, and the substrate including the cobalt film formed thereon is thermally treated to provide a cobalt silicide film on a gate electrode and in the active region only. The cobalt film may easily make contact with a metal that is successively formed.
However, a process margin for forming the metal silicide film may be extremely reduced since a semiconductor device has a high integration degree as the design rule of the semiconductor device decreases. Thus, the metal silicide film may not be stably formed in an active region of a substrate. For example, an undercut may be generated beneath a gate electrode positioned in a field region of the substrate because an oxide film beneath the gate electrode may be etched by a wet cleaning process for removing remaining impurities or a native oxide film on the substrate. When the substrate is etched using a RF sputtering apparatus, silicon in the gate electrode and the substrate may be sputtered onto a spacer of the gate electrode and the undercut beneath the gate electrode. As a result, silicon remains in an insulation region of the substrate. In case that a silicidation process is performed for forming the metal silicide film on a resultant structure formed on the substrate, the metal silicide film is formed on the spacer and beneath the gate electrode, thereby causing a short failure of a semiconductor device. When a self-aligned contact (SAC) pad is formed, or a mis-alignment is generated during a formation of a contact hole, a short of the semiconductor device may be caused due to the metal silicide film positioned on the spacer. Additionally, a leakage current or an electrical short may be caused due to the metal silicide film formed along gate electrodes when the gate electrodes are formed in the active and field regions.
Embodiments of the invention address these and other disadvantages of the conventional art.
SUMMARY OF THE INVENTION
Embodiments of the invention form a stable and uniform metal silicide film on the source/drain regions and gate electrodes of the transistors using radio frequency sputtering and wet cleaning processes. As a result, the contact resistance due to the metal silicide film can be reduced to provide a high operation speed of a semiconductor device and an improved performance of the semiconductor device.
REFERENCES:
patent: 6303503 (2001-10-01), Kamal et al.
patent: 2002/0146897 (2002-10-01), Nulty et al.
Lee Eung-Joon
Park In-Sun
Park Ji-Soon
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
Sarkar Asok Kumar
Zarneke David A.
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