Method for forming semiconductor integrated circuit device havin

Details Method for forming semiconductor integrated circuit device havin Method for forming semiconductor integrated circuit device havin

1996-08-09

1998-09-08

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

H01L 218242

Patent

active

058044795

ABSTRACT:
The etch-back amount of a silicon oxide film of a memory array which is a higher altitude portion is increased when etching back and flattening the silicon oxide film by arranging a first-layer wiring on a BPSG film covering an upper electrode of an information-storing capacitative element only in a peripheral circuit but not arranging it in the memory array.
Thus, a DRAM having a stacked capacitor structure is obtained such that the level difference between the memory array and peripheral circuit is decreased, and the formation of wiring and connection holes are easy.

REFERENCES:
patent: 5389558 (1995-02-01), Suwanai et al.
patent: 5405800 (1995-04-01), Ogawa et al.

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