Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-11-18
2000-07-25
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438596, 438682, 438592, 438303, H01L 21336
Patent
active
060936096
ABSTRACT:
A method has a feature that one side of the spacers surrounding a gate of a MOS transistor is removed and another side of the spacers is exposed. By the method of this invention, the gate, the source and the pick-up region of a well are electrically connected by a plug through a silicide layer covering them. Furthermore, the pick-up region is adjacent to the source such that the effective surface area can be reduced and the process has a higher error tolerance.
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patent: 5681768 (1997-10-01), Smayling et al.
patent: 5895269 (1999-04-01), Wang et al.
patent: 5985707 (1999-11-01), Gil
Bowers Charles
Chen Jack
United Microelectronics Corp.
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