Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-06-13
2002-03-26
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S270000, C438S303000, C438S305000, C438S286000, C438S589000, C438S595000
Reexamination Certificate
active
06362060
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device and a method of manufacturing the same in which one of the electrode region is formed in a recess or a trench of a substrate.
2. Background of the Related Art
As the integration of semiconductor devices increases, the width of a gate becomes narrower, and thus, the length of a channel shortens. Therefore, the electric field in the vicinity of a drain is increased to accelerate carriers of the channel region in a depletion layer near the drain during the operation of a device, thereby causing a hot-carrier effect of injecting the carriers into a gate oxide film. The carriers injected into the gate oxide film create static charges in the interface between a semiconductor substrate and the gate oxide film, thereby varying a threshold voltage (V
TH
), or reducing a mutual inductance to deteriorate the device characteristics. Accordingly, in order to decrease the degradation of the device characteristics caused by the hot-carrier effect, a lightly doped drain (LDD) structure is used.
FIG. 1
is a cross-sectional view of a related art semiconductor device in which, on a predetermined part of a P-type semiconductor substrate
11
, a device isolation region
13
for defining an active region of the device is formed by a local oxidation of silicon (LOCOS) method. A gate
17
is formed on a predetermined part of the active region of semiconductor substrate
11
, with a gate insulating film
15
imposed therebetween. A capping oxide film
19
is formed on gate
17
. A sidewall
23
is formed on the sides of both gate
17
and capping oxide film
19
.
The semiconductor substrate
11
is doped on both sides of gate
17
with a low concentration of N-type impurity, thereby forming a low concentration region
21
for the LDD structure. Further, the semiconductor substrate is doped with a high concentration of N-type impurity so as to be partially overlapped with low concentration region
21
, thereby forming source and drain regions
25
and
27
, respectively. Source and drain regions
25
and
27
are formed using capping oxide film
19
and sidewall
23
as a mask. Low concentration region
21
is located between source and drain regions
25
and
27
and gate
17
.
However, according to the aforementioned related art semiconductor device, low concentration region
21
for the LDD structure is formed in source region
25
as well as in drain region
27
, so that the source resistance is increased thereby causing the current characteristics of the device to deteriorate. Further, if the bias of drain region
27
increases, a depletion region is increased, thereby causing a drain-induced barrier lowering (hereinafter, referred to as “DIBL”) phenomenon that reduces the potential barrier of the source. In addition, due to the limitations of a photolithographic methods, reduction of the gate width is difficult.
SUMMARY OF THE INVENTION
An object of the invention is to solve at least the above problems and/or disadvantages and to provide at least the advantages described hereinafter.
An object of the present invention is to obviate one or more of the problems of the related art.
Another object of the present invention is to reduce the source resistance.
Another object of the present invention is to suppress the occurrence of the DIBL phenomenon even if the channel length is short.
A further object of the present invention is to provide a narrow gate.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a semiconductor device of the present invention comprises: a semiconductor substrate of a first conductivity type; a device isolation region formed on a predetermined part of the surface of the semiconductor substrate to define an active region of the device; a trench formed on a predetermined part of one side of the active region on the semiconductor substrate; a gate oxide film formed on predetermined parts of the side and the lower part of the trench; a gate formed such that the lower part and a first side thereof are in contact with the surface of the gate oxide film and the second side of the gate is exposed; a sidewall formed so as to be in contact with the second side of the gate; a low concentration region formed by doping an impurity of a second conductivity type opposite, to that of the semiconductor substrate, with a low concentration of dopant in the lower part of the sidewall; and source and drain regions formed by doping an impurity of the second conductivity type with a high concentration of dopant, using the gate and the sidewall as a mask.
In another aspect, the present invention provides a semiconductor device comprising: a semiconductor substrate of a first conductivity type; a device isolation region formed on a predetermined part of the surface of the semiconductor substrate to define an active region of the device; a trench formed on a predetermined part of one side of the active region on the semiconductor substrate; a gate oxide film formed on a predetermined part of the lower surface of the trench so as to be spaced apart from the side of the trench by a predetermined distance; a gate formed on the gate oxide film and having first and second sides; a low concentration region formed by doping an impurity of a second conductivity type, opposite to that of the semiconductor substrate, at a low concentration in the lower surface between the first side of the gate and the side of the trench; and source and drain regions formed by doping an impurity of the second conductivity type at a high concentration in a part of the semiconductor substrate in the direction of the first side of the gate not doped at a low concentration and a part of the semiconductor substrate in the direction of the second side of the gate.
In another aspect, the present invention provides a method of manufacturing a semiconductor device comprising the steps of: forming a trench in a predetermined part of one side of a semiconductor substrate of a first conductivity type; forming a gate oxide film on the surface of the semiconductor substrate including the inner surface of the trench; depositing a polycrystalline silicon material on the upper part of the gate oxide film and etching back the polycrystalline silicon material to form a gate such that the first side thereof is in contact with the side of the trench and the second side of the gate is exposed; ion-implanting an impurity of a second conductivity type, opposite to that of the semiconductor substrate, using the gate as a mask to thereby form low concentration regions on both sides of the gate; forming a sidewall on the second side of the gate; and ion-implanting a high concentration of an impurity of the second conductivity type, using the gate and the sidewall as a mask, to thereby form source and drain regions in the semiconductor substrate in the direction of the first side of the gate and in the semiconductor substrate excluding the lower part of the sidewall in the direction of the second side of the gate.
In another aspect, the present invention provides a method of manufacturing a semiconductor device comprising the steps of: forming a trench in a predetermined part of one side of a semiconductor substrate of a first conductivity type; forming a gate oxide film on the surface of the semiconductor substrate including the inner surface of the trench; forming a sidewall such that a first side thereof is in contact with a side or inner wall of the trench and the second side of the sidewall is exposed, with the gate oxide film imposed between the side of the trench and the first side of the sidewall; forming a gate such that the first side thereof is in contact with the second side of the sidewall and the second side of the gate is exposed; ion-implanting a high concentration of an impurity having a second conductivity type, opposite to that of the semiconductor substrate
Ahn Jae-Gyung
Son Jeong-Hwan
Bowers Charles
Chen Jack
Fleshner & Kim LLP
Hyundai Electronics Industries Co,. Ltd.
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