Method for forming poly-via connection between load transistor d

Details Method for forming poly-via connection between load transistor d Method for forming poly-via connection between load transistor d

1997-06-06

1999-08-10

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438241, 438953, 438152, 438153, H01L 218234

Patent

active

059372915

ABSTRACT:
A manufacturing method applicable for forming a via connection to the thin film transistor in a SRAM unit which resolves the problems arising from a conventional method for forming a via for linking up the drain of a load transistor with the gate of a driver transistor in a SRAM unit by changing the processing sequence and also by forming a plug instead of a via.

REFERENCES:
patent: 5654239 (1997-08-01), Sakamoto
patent: 5702988 (1997-12-01), Liang
patent: 5717240 (1998-02-01), Kuriyama et al.

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